1. Technical Field of the Invention
The present invention relates generally to analog to digital (A/D) converters and in particular to folder circuits. Still more particularly, the present invention relates to an input driver for use with a differential folder having a static ladder and a method of operation thereof.
2. Description of the Related Art
There are various types of devices, typically called analog to digital converters (A/D), for converting an analog voltage to a digital signal representative of the analog voltage. One type of A/D converter is a xe2x80x9cflashxe2x80x9d converter wherein an analog signal is applied to multiple identical comparators, generally one for each possible quantization level. For example, for a device that generates a n-bit digital output word, there are 2n possible quantization levels and one fewer comparator. An eight-bit A/D converter would typically have 28xe2x88x921, i.e., 255, comparators, each of which receives two inputs. The analog signal to be converted is applied to one input of each of the comparators and each comparator other input is tied to different, normally equally spaced, reference voltage. These reference voltages are typically derived from a reference static ladder, such as a resistance ladder. When a convert signal is applied to the comparators, each of the comparators that is tied to a reference voltage higher than the analog input signal generates a xe2x80x9c1xe2x80x9d output signal. The comparators that are tied to reference voltages lower in value than the analog input signal generate xe2x80x9c0xe2x80x9d output signals. The resultant outputs are sometimes referred to as a xe2x80x9cthermometer codexe2x80x9d of xe2x80x9c1""sxe2x80x9d and xe2x80x9c0""sxe2x80x9d arrayed on each side of a transition point that represents the analog input signal. The location of this transition point is then decoded to produce a digital output representation of the analog input signal at that point in time.
Folding is a type of analog preprocessing that is utilized to reduce the number of comparators in an A/D converter, such as the flash converter described above. A simplified block diagram of an exemplary folding A/D converter 100 is depicted in FIG. 1. Folding A/D converter 100 includes a preprocessing section 110 that so includes a plurality of folding circuits, or folders, that receive an analog input signal. The pre-processed analog signal is then provided to an interpolation section 120 prior to delivery to a comparator and logic section 130 that, in turn, generates a N-bit digital output signal. This method is employed to reduce the number of A/D comparators for a given N bit A/D. For example, a six-bit flash A/D would typically need sixty-three comparators. A folding type A/D with four folders, on the other hand, would only employ sixteen comparators for the least significant bit (LSB) information and three comparaters for the most significant bit (MSB) information. For more information on how a Folding A/D circuit operates, see xe2x80x9cA 70-MS/s 110-mW 8-b CMOS Folding and Interpolating A/D Converterxe2x80x9d by Braum Nauta, et al, IEEE Journal of Solid-State Circuits, vol. 30, no. 12, December 1995, pp. 1302-1308, which is herein incorporated in its entirety by reference.
A schematic diagram of an embodiment of an exemplary single-ended folder circuit 200 is illustrated in FIG. 2. In practice, folder 200 would typically be one of N (where N greater than 1) folder stages. In the depicted embodiment, transistors Q1-Q8 represent a typical folding stage with load resistors R0 and R1. The driving stage for folder 200 includes transistor Q9 that is coupled to an input AC signal Vin. A reference ladder comprising of resistors R6-R8 and coupled to a ladder reference signal Ladder_Reference provides voltage references V-N1, V_N2, V_N3 and V_N4 for the differential amplifier pairs in the folding stage. It should be noted that for simplicity, only one folding stage is shown. Those skilled in the art should readily appreciate that a practical implementation may include four or more folder stages utilizing a single static reference ladder and one folder driver. An exemplary graph illustrating the relationship between an output voltage Vout and the input voltage Vin for the single-ended folder 200 is depicted in FIG. 3A. The characteristic folding operation is shown as input voltage Vin increases. As input voltage Vin increases in value, the differential amplifier pair of transistors Q1 and Q2 switches a current J1 across load resistors R0 and R1. The continual increase of input voltage Vin will subsequently alternate currents J2, J3 and J4 across load resistors R0 and R1, resulting in output voltage Vout reversing polarity at each zero crossing.
Additional folding may be utilized to produce additional folding signals to drive into each A/D comparator. Ultimately each A/D comparator is driven by its own unique folded waveform whose zero crossing is typically shifted by one LSB. Thus a six-bit A/D with four folders would need sixteen folded signals. To obtain sixteen folded signals employing only four folder stages, an interpolation technique is utilized to generate four waveforms per one folder stage. FIG. 3B illustrates an exemplary graph of the signal outputs generated by four folder stages, generally designated F1, F2, F3 and F4, versus an input voltage Vin, i.e., a linear ramp in the illustrative embodiment. As shown in the illustrated graph, the zero crossings of each of the four folder outputs F1, F2, F3 and F4 are spaced by about 100 mV of input voltage Vin signal change.
One important parameter of folding A/Ds is the integrity of the zero crossings of the folder outputs. The A/D comparators discern between a logic xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d utilizing the folder output signals and the signals generated by the interpolation process. The exemplary graph depicted in FIG. 4A presents a closer look at interpolated signals, designated F2_A, F2_B and F2_C generated by folder outputs F2 and F3. It should be noted that these five signals, F2_A, F2_B, F2_C, F2 and F3 would typically be the input signals for the A/D comparators. The distance between the zero crossings, e.g., referenced as VLSB, determines the input voltage margin between each of the comparators referenced to input signal Vin. As shown in FIG. 4A, input signal Vin increases 25 mV from when interpolated signal F2_A crossed zero to when interpolated signal F2_B crossed zero. Since the folders generally have gain, i.e., Vout/Vin greater than 1, the actual voltage margin as seen by the A/D comparator is VLSB_out=VLSB_in(Gain). For example, if the Gain is 2.8, the resultant VLSB_out=25 mV(2.8)=70 mV.
In the event that time-dependent noise disrupts input signal Vin relative to the static ladder reference voltages, the folder outputs F2 and F3 will also shift their respective zero crossings with respect to input signal Vin. To illustrate, with reference to FIG. 4B, a 25 mV shift of common mode noise will cause input signal Vin to also shift 25 mV. This, in turn, will also result in the interpolated zero crossing shifting to cause a 70 mV, one LSB error as seen by the comparators. This is a highly undesirable condition for an A/D converter needing to achieve one-half (xc2xd) LSB accuracy that has high speed interference on its input power supply.
Accordingly, what is needed in the art is an improved folding A/D converter that mitigates the above-described limitations.
It is therefore an object of the present invention to provide an improved differential folder for use in an analog to digital (A/D) converter.
It is another object of the present invention to provide an input driver for use with a differential folder having a static ladder and a method of operation thereof.
To achieve the foregoing objects, and in accordance with the invention as embodied and broadly described herein, an input driver for use with a differential folder having a static ladder that provides an array of reference voltages is disclosed. The input driver includes a differential signal driver, coupled to an AC input signal, that generates first and second complementary drive signals for a differential folder stage. A tracking circuit, coupled to the differential signal driver, is utilized to maintain a voltage at the center of the static ladder to improve common mode rejection of the input driver without reducing bandwidth. In a related embodiment, the voltage at the center of the static ladder is an average DC voltage of the first and second drive signals.
The present invention introduces a novel circuit that improves the analog preprocessing of an input analog signal before the A/D comparators sample the signal. Specifically, the present invention improves the common mode rejection of the input driver without sacrificing, or reducing, bandwidth. The present invention accomplishes this by forcing the center of the static reference ladder to be the same value as the DC average voltage of the differential driving signals. This, in turn, maintains the integrity of the folder output signals"" zero crossings, i.e., no shifting, with minimal gain reduction.
In one embodiment of the present invention, the input driver further includes a common mode current generator. The current mode generator is utilized to provide current mode currents so that the common mode voltage at the output of the differential folder will not saturate the differential amplifier pairs employed in the folder stage.
In another embodiment of the present invention, the differential signal driver includes a positive phase and a negative phase emitter follower transistor pair, wherein each of the positive phase and negative phase emitter follower transistor pair having a collector coupled to a supply voltage and a base coupled to opposite phases of said input AC signal, respectively. In a related embodiment, the differential signal driver further includes first and second resistances coupled to emitter terminals of the positive and negative phase emitter follower transistor pair, respectively. The first and second resistances, in an advantageous embodiment, are a matched pair of resistors.
In yet another embodiment of the present invention, the tracking circuit utilizes an operational amplifier (op-amp) configured as a voltage follower. It should be readily apparent to those skilled in the art that other circuit devices and/or topologies may also be employed in place of the op-amp configured as a voltage follower. The present invention does not contemplate limiting its practice to any one particular circuit configuration.
The foregoing description has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject matter of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.